Makefile #02

SHELL = /bin/sh

CC = gcc
CFLAGS = -g -Wall
LIBS = -lm

TARGET = test
SRC = sin01.c cos02.c tan03.c
OBJS = $(SRC:.c=.o)
DEPEND = Makefile.depend

all: $(TARGET)

depend:
<-- TAB -->$(CC) -MM -MG $(SRC) > $(DEPEND)

$(TARGET): $(OBJS)
<-- TAB -->$(CC) -o $@ $^ $(LIBS)

.c.o:
<-- TAB -->$(CC) -c $(CFLAGS) $<

clean:
<-- TAB -->-rm -f $(OBJS) $(TARGET) $(DEPEND) *~

-include Makefile.depend